Profile
Professor in the field of Electronics & Communications Engineering
Electronic Circuit Design, VLSI Design (MOST Level), Device Simulation and Modeling, RF Identification,RF Power Semiconductor and Modeling
- B. E
Govt. College of Engineering (CoEP) PUNE University
June-1983 - M.Tech
IISc, Bangalore
Jan-1989 - PhD
IIT Bombay
July-2003
- Oct 1999-Nov 2001 Research Engineer
Indian Institute of Technology Mumbai
- Sept. 2003-Sept. 2006 Asst Professor
Dept. of Electronic Engineering Konkuk University Seoul, South Korea
- Oct 2006-July 2009 Asso. Professor
Korea Advanced Institute of Science and Technology, Daejeon South Korea
- Oct 2008-Sept 2009 Dean/ Director
Symbiosis Institute of Technology
- Jan 2010-July 2012 Asso. Professor
PDPM IIITDM, Jabalpur
- July 2012-Present Professor
PDPM IIITDM, Jabalpur
- May 2011-Aug 2013 Chairman, Placement Cell
PDPM IIITDM, Jabalpur
- June 2011 -Present Head Counseling Services
PDPM IIITDM, Jabalpur
- Jan 2014 -Present Transparency Officer
PDPM IIITDM, Jabalpur
- Aug 2014 -June2016 Head of Dept. ECE
PDPM IIITDM, Jabalpur
- Jan 2010- July 2012 Head of Dept. ECE
PDPM IIITDM, Jabalpur
- 2016- NIRF- National Ranking Frame work Nodal Officer
PDPM IIITDM, Jabalpur
- June 2010 -Present Member of Senate
PDPM IIITDM, Jabalpur
- June 2016-Present Dean (Planning & Development)
PDPM IIITDM, Jabalpur
- Dec-2014 -Present Member Board of Governors, (BoG) and BWC
PDPM IIITDM, Jabalpur
- 26 August 2017-31 Aug 2017 Acting Registrar
PDPM IIITDM, Jabalpur
- June 2016- Co. Cheif Investigator
Electronics and ICT Academy PDPM IIITDM Jabalpur
My courses
Current & Previous
| Course Code | Course name | Category | Institute |
|---|---|---|---|
| EC 202 | Electronic Devices and Circuit | UG/ | PDPM IIITDM, Jabalpur |
| EC 308 (a) | Linear Integrated Circuit | UG/ | PDPM IIITDM, Jabalpur |
| EC 309 (a) | Analog IC Design | UG/PG/PhD | PDPM IIITDM, Jabalpur |
Research
Areas or Specialisation / Project Activities / Publications / Books
Electronic Circuit Design, VLSI Design...
- C2SD-SMDP
Duration: 2015-2020 Sponsored by MeitY ( Govt. of India)
- Electronics & ICT Academy
Co- Chief Investigator: June 2016 to 2019, funded by MietY Govt of India
- Affordable Eco Friendly Rural cooking System (Solar operated Induction cooking
Principal Investigator: August 2017-August 2019 Sponsered through Bio-Design Innovation Centre DIC-HUB RDVV
- P. N. Kondekar, K. Nigam, S. Pandey andD. Sharma, Design and Analysis of Polarity Controlled Electrically Doped Tunnel FET With Bandgap Engineering for Analog/RF Applications, IEEE Transactions on Electron Devices, vol. 64, no. 2, pp. 412-418, Feb. 2017
- Sangeeta Singh, Pravin Kondekar, Ruchir Sinha, 'Impact of PZT Gate-Stack Induced Negative Capacitance on Analog/RF Figures-of-merits of Electrostatically Doped Ferroelectric Schottky Barrier Tunnel FET', IET Circuits, Devices & Systems, 2018.
- Bhaskar Awadhiya, Pravin N. Kondekar, Ashvinee Deo Meshram, Analogous behavior of FE-DE heterostructure at room temperature and ferroelectric capacitor at Curie temperature, Superlattices and Microstructures, Volume 123, Pages 306-310, 2018.
- Bhaskar Awadhiya, Pravin N. Kondekar, Ashvinee Deo Meshram, 'Passive voltage amplification in non-leaky ferroelectric–dielectric heterostructure', Micro & Nano Letters, 2018, 13, (10), p. 1399-1403
- Sachin Agrawal, Manoj Singh Parihar & Pravin N. Kondekar (2018) Exact Performance Evaluation of RF Energy Harvesting with Different Circuit's Elements, IETE Technical Review, 35:5, 514-522
- Sunil Pandey, Tushar Gawande, P. N.Kondekar, A 3.1–10.6 GHz UWB LNA Based on Self Cascode Technique for Improved Bandwidth and High Gain, 2018, p. 1867-1882
- Sunil Pandey, Tushar Gawande, Abhijeet Pathak & Pravin Neminath Kondekar (2018) A 0.9-V, 4.4-mW CMOS LNA with wideband input match and high gain for UWB applications, International Journal of Electronics Letters, 6:3, 329-337.
- Sachin Agrawal, M.S. Parihar & P.N. Kondekar, Performance Analysis of a Low Profile Hybrid Antenna for Broadband Applications, Wireless Pers Commun (2018) 100: 995.
- Kaushal Nigam, Sarthak Gupta, Sunil Pandey, P N Kondekar & Dheeraj Sharma (2018) Controlling the ambipolarity and improvement of RF performance using Gaussian Drain Doped TFET, International Journal of Electronics, 105:5, 806-816.
- Sachin Agrawal, Manoj Singh Parihar & P. N. Kondekar (2018) Broadband Rectenna for Radio Frequency Energy Harvesting Application, IETE Journal of Research, 64:3, 347-353.
- Sunil Pandey, Tushar Gawande, Shashank Inge, Abhijeet Pathak, Pravin N Kondekar, 'Design and analysis of wideband low-power LNA for improved RF performance with compact chip area', IET Microwaves, Antennas & Propagation, 2018, 12, (11), p. 1816-1820.
- Sangeeta Singh, P. N. Jaiswal, Neeraj Kumar Kondekar, Comparative Analysis of T-Gate and L-Gate Dielectric Modulated Schottky Tunneling Source Impact Ionization MOS for Label-Free Detection of Toxic Gases,Journal of Nanoelectronics and Optoelectronics, Volume 13, Number 4, April 2018, pp. 501-508(8).
- Sachin Agrawal, M. Parihar, P.N. Kondekar, (2018). A dual-band rectenna using broadband DRA loaded with slot. International Journal of Microwave and Wireless Technologies, 10(1), 59-66. doi:10.1017/S1759078717001234
- Sumit Kale, Pravin N. Kondekar, Charge plasma based source/drain engineered Schottky Barrier MOSFET: Ambipolar suppression and improvement of the RF performance, Superlattices and Microstructures, Volume 113, 2018, Pages 799-809.
- Singh D., Pandey S., Sharma D., Kondekar P.N. (2018) A Charge Plasma Based Dielectric Modulated Heterojunction TFET Based Biosensor for Health-IoT Applications. In: Somani A., Srivastava S., Mundra A., Rawat S. (eds) Proceedings of First International Conference on Smart System, Innovations and Computing. Smart Innovation, Systems and Technologies, vol 79. Springer, Singapore
- Shashank V. Inge, Neeraj K. Jaiswal, and Pravin N. Kondekar. "Realizing Negative Differential Resistance/Switching Phenomena in Zigzag GaN Nanoribbons by Edge Fluorination: A DFT Investigation." Advanced Materials Interfaces (2017).(Impact factor-4.279)
- Anju, Pandey S., Yadav S., Nigam K., Sharma D., Kondekar P.N. (2018) Realization of Junctionless TFET-Based Power Efficient 6T SRAM Memory Cell for Internet of Things Applications. In: Somani A., Srivastava S., Mundra A., Rawat S. (eds) Proceedings of First International Conference on Smart System, Innovations and Computing. Smart Innovation, Systems and Technologies, vol 79. Springer, Singapore
- S. Kale and P. N. Kondekar “Design and Investigation of Dielectric Engineered Dopant Segregated Schottky Barrier MOSFET with NiSi Source/Drain” accepted in IEEE Transactions on Electron Devices Aug. 2017.
- S. Agrawal, R. D. Gupta, M.S. Parihar, and P. N. Kondekar, “A Wideband High Gain Dielectric Resonator Antenna For RF Energy Harvesting Application,” AEU-International Journal of Electronics and Communications, 2017, (Impact factor-0.786)
- P. Venkatesh, K. Nigam, S. Pandey, D. Sharma and P. N. Kondekar "Impact of Interface Trap Charges on Performance of Electrically Doped Tunnel FET with Heterogeneous Gate Dielectric," in IEEE Transactions on Device and Materials Reliability, vol. 17, no. 1
- B. R. Raad, S. Tirkey, D. Sharma and P. N. Kondekar, "A New Design Approach of Dopingless Tunnel FET for Enhancement of Device Characteristics, accepted in IEEE Transactions on Electron Devices, March 2017. (Impact factor - 2.605)
- Anju, S. Tirkey, K. Nigam, S. Pandey, D. Sharma and P. N. Kondekar, " Investigation of gate material engineering in junctionless TFET to overcome the trade-off between ambipolarity and RF/Linearity metrics, Superlattices and Microstructures, Available onl
- P. Venkatesh, K. Nigam, S. Pandey, D. Sharma and P. N. Kondekar, A dielectrically modulated electrically doped tunnel FET for application of label free biosensor, Superlattices and Microstructures, Available online 18 May 2017, ISSN 0749-6036, https://doi
- B. Awadhiya, S. Pandey, K. Nigam and P. N. Kondekar, Effect of ITC's on Linearity and Distortion Performance of Junctionless Tunnel Field Effect Transistor, Superlattices and Microstructures, accepted (In press), ISSN 0749-6036. (SCI Indexed, IF-2.17)
- S. Pandey, T. Gawande and P. N. Kondekar, " A 0.9 V, 4.57 mW UWB LNA with improved gain and low power consumption for 3.1-10.6 GHz ultra-wide band applications, available online on 26 April 2017 in Springer Wireless Personal Communications, ISSN 1572-834X
- S. Agrawal, M.S. Parihar, and P. N. Kondekar, “A dual-band RF energy harvesting circuit using 4th order dual-band matching network,” Cogent Engineering, 2017 1332705.
- B. R. Raad, S. Tirkey, D. Sharma and P. N. Kondekar, "A New Design Approach of Dopingless Tunnel FET for Enhancement of Device Characteristics, accepted in IEEE Transactions on Electron Devices, March 2017. (Impact factor - 2.605)
- B. R.Raad, D.Sharma,K. Nigam,P. N. Kondekar, “Utility of II-V group ternary compound semiconductor materials for unipolar conduction in tunnel field-effect transistor,” Journal of computational electronics. (Accepted, in press)(Impact factor –1.86)(Impact factor – 1.1)
- D. Singh, S. Pandey, K. Nigam, D. Sharma, D. S. Yadav, P. N.Kondekar, A Charge Plasma based Dielectric Modulated Junctionless TFET for Biosensor Label Free Detection, IEEE Transactions on Electron Devices, vol. 64, no. 10, pp. 271-278, Jan. 2017. (Impact factor - 2.605)
- Sangeeta Singh, ArunPratap Singh, P.N. Kondekar, A novel self-aligned charge plasma Schottky barrier tunnel FET using work function engineering, Elsevier Microelectronics Engineering, vol. 168, pp.67-75, 2017.
- M. Verma, D. Sharma, S. Pandey, K. Nigam, P.N. Kondekar, Performance Comparison of Single and Dual Metal Dielectrically Modulated TFETs for the Application of Label Free Biosensor, Elsevier Superlattices and Microstructures, vol. 101, Jan. 2017, pp. 219-227, ISSN 0749-6036(Impact factor - 2.1).
- S. Singh, R. Sinha, P.N. Kondekar, Estimation of Analog/Radio-Frequency Figures-of-Merits and Circuit Performance of Dynamically Reconfigurable Electrostatically Doped Silicon Nanowire Schottky Barrier FET, Journal of Nanoelectronics and Optoelectronics, April 2017. (Accepted, in press) (Impact factor – 0.675).
- S. Dubey and P. N. Kondekar, Asymmetrically doped stacked channel strained SOI FinFET, Elsevier Superlattices and Microstructures, vol. 102, Feb. 2017, pp. 74-78, ISSN 0749-6036 (Impact factor - 2.1).
- D. Sharma, B. R.Raad, D. S. Yadav, P. N. Kondekar and Kaushal Nigam, Two-dimensional potential, electric field and drain current model of source pocket hetero gate dielectric triple work function tunnel field-effect transistor, IET Micro and Nano letters, vol. 12, issue 1, pp. 11-16, Jan. 2017. (Impact factor – 0.85)
- K. Nigam, S. Pandey, P. N. Kondekar, D. Sharma, M.Verma and Anju, 'Performance Estimation of Polarity Controlled Electrostatically Doped Tunnel Field Effect Transistor', Micro & Nano Letters, 2016, DOI: 10.1049/mnl.2016.0729.(Impact factor – 0.85)
- K. Nigam, S. Pandey, P. N. Kondekar, D. Sharma and Pawan Kumar, "A Barrier Controlled Charge Plasma Based TFET with Gate Engineering for Ambipolar Suppression and RF/Linearity Performance Improvement, accepted in IEEE Transactions on Electron Devices, March 2017. (Impact factor - 2.605)
- A.Naugarhiya, P. Wakhradkar, P. N. Kondekarand R. Patrikar, “Analytical model for 4H-SiC superjunction drift layer with anisotropic properties for ultrahigh-voltage applications,” Journal of computational electronics. (Accepted, in press). (Impact factor – 1.1)
- D. Sharma, B. R. Raad, D. S. Yadav, P. N. Kondekar, and K. Nigam, “Two-dimensional potential, electric field and drain current model of source pocket hetero gate dielectric triple work function tunnel field-effect transistor, ” Micro and Nano letters. (Accepted, in press)(Impact factor –0.85)
- B. R. Raad, D. Sharma, P. Kondekar, K. Nigam, and D. S. Yadav, "Drain Work Function Engineered Doping-Less Charge Plasma TFET for Ambipolar Suppression and RF Performance Improvement: A Proposal, Design, and Investigation," IEEE Transactions on Electron Devices, Vol. 63 no 10, pp. 3950-3957, Oct. 2016. (Impact factor - 2.605)
- K. Nigam, S. Pandey, P N Kondekar, and D. Sharma, "Temperature sensitivity analysis of polarity controlled electrostatically doped tunnel field effect transistor," Superlattices and Microstructures, vol. 97, pp. 598-605, Sept. 2016. (Impact factor - 2.1)
- K.Nigam, P.N. Kondekar, D. Sharma, and B. R.Raad, "A New Approach for Design and Investigation of Junction-Less Tunnel FET Using Electrically Doped Mechanism," Superlattices and Microstructures, vol. 98, pp. 1-7, Oct. 2016.(Impact factor - 2.1)
- K.Nigam, P.N. Kondekar, and D. Sharma, "Approach for ambipolar behaviour suppression in tunnel FET by work-function engineering," Micro & Nano Letters, vol. 11, issue 8, pp. 460 - 464, Aug. 2016. (Impact factor - 0.85)
- B. Raad, D. Sharma, K. Nigam, and P. N.Kondekar, "Physics Based Simulation Study of High Performance GaAsP-InGaAs TFET," Micro & Nano Letters, vol. 11, issue 7, pp. 366 – 368, Jul. 2016. (Impact factor - 0.85)
- S. Dubey and P. N. Kondekar, "Fin shape dependent variability for strained SOI FinFETs," Microelectronic Engineering, vol. 162, pp. 63–68, Apr. 2016. (Impact factor- 1.27)
- B. R. Raad, K. Nigam, D. Sharma, and P.N. Kondekar, "Performance investigation of bandgap, gate material work function and gate dielectric engineered TFET with device reliability improvement," Superlattices and Microstructures, vol. 94, pp. 138-146, Apr 2016. (Impact factor- 2.1)
- K. Nigam, P. N. Kondekar, and D. Sharma, "High Frequency Performance of Dual Metal Gate Vertical Tunnel Field Effect Transistor Based on Work Function Engineering," Micro & Nano Letters, vol. 11, issue 6, p. 319 – 322, June 2016, Apr. 2016. (Impact factor - 0.85)
- B. Raad, K. Nigam, D. Sharma, and P. N.Kondekar, "Dielectric and Work function Engineered TFET for Ambipolar Suppression and RF Performance Enhancement," Electronics Letters, vol. 52, issue 9, pp. 770 – 772, Apr. 2016. (Impact factor - 0.93)
- S. Singh, R.Sinha, and P.N. Kondekar, "A novel ultra steep dynamically reconfigurable electrostatically doped silicon nanowire Schottky Barrier FET," Superlattices and Microstructures, vol. 93, pp. 40–49, May 2016. (Impact factor- 2.1)
- S. Singh, P. N. Kondekar and Neeraj Jaiswal, “Label-Free Biosensor using Nanogap Embedded Dielectric Modulated Schottky Tunneling Source Impact Ionization MOS,” Microelectronic Engineering, 149, 129-134, 2016. (Impact factor 1.27)
- S. Singh, P. N. Kondekar, and P. Pal, "Transient performance estimation of charge plasma based negative capacitance junctionless tunnel FET," Journal of Semiconductors, vol. 37, no. 2, pp. 02-03, Jun. 2015.
- S. Singh, and P.N. Kondekar, "A novel dynamically configurable electrostatically doped silicon nanowire impact ionization MOS," Superlattices and Microstructures, vol. 88, pp. 695–703, Dec. 2015. (Impact factor- 2.1)
- K. Nigam, P. N. Kondekar and D. Sharma, "DC characteristics and analog/RF performance of novel polarity control GaAs-Ge based tunnel field-effect transistor," Superlattices and Microstructures, vol. 92, pp. 224–231, Apr. 2016. (Impact factor- 2.1)
- S. Dubey andP. N.Kondekar, "Performance comparison of conventional and strained FinFET inverters," Microelectronics Journal, vol. 55, pp. 108–115, Sept. 2016. (Impact factor- 0.88)
- S. Kaleand P. N. Kondekar, "Ferroelectric Schottky Barrier Tunnel FET with Gate-Drain Underlap: Proposal and Investigation," Superlattices and Microstructures, vol. 89, pp. 225-230, 2016. (Impact factor- 2.1)
- S. Singh and P. N. Kondekar, "A novel process variation immune dopingless zero sub-threshold slope and zero impact ionization FET (DL-Z2 FET) based on transition metals," Journal of Computational Electronics, vol. 15, issue 1, pp 67–75, Mar. 2016. (Impact factor- 1.1)
- A. Chakraborty andP.N. Kondekar, "Driving current improvement by layer in P-channel tunnel field-effect transistor," Journal of Electron Devices, Vol. 15, pp. 1282-1284, 2012.
- S.Singh and P.N. Kondekar, "Analytical modeling of Schottky tunneling source impact ionization MOSFET with reduced breakdown voltage," Engineering Science and Technology, an International Journal, vol. 19, issue 1, pp. 421–428, Mar. 2016.
- S.Kale and P. N. Kondekar, "Suppression of ambipolar leakage current in Schottky barrier MOSFET using gate engineering," Electronics Letters, vol. 51, no. 19, pp. 1536-1538, 2015. (Impact factor – 0.93)
- S. Kale and P. N. Kondekar, "Design and investigation of double gate Schottky barrier MOSFET using gate engineering," Micro & Nano Letters, vol. 10, issue 12, pp. 707-711, 2015. (Impact factor - 0.85)
- A. Naugarhiya, S.Dubey and P.N. Kondekar, “Novel strained superjunction VDMOS,” Superlattices and Microstructures, vol. 85, pp. 461-468, 2015. (Impact factor – 2.1)
- A.Naugarhiya and P. N. Kondekar, "High permittivity material selection for design of optimum Hk VDMOS," Superlattices and Microstructures, vol. 83, pp. 310-321, 2015. (Impact factor – 2.1)
- S. Singh, P. Pal andP. N. Kondekar, "Charge-plasma-based super-steep negative capacitance junctionless tunnel field effect transistor: design and performance," Electronics Letters, vol. 50, no. 25, pp. 1963-1965, 2014.(Impact factor - 0.93)
- S. Singh and P.N. Kondekar, "Dopingless Super-steep Impact Ionization MOS (Dopingless-IMOS) Based on Work-function Engineering," Electronics Letters, vol. 50, no. 2, pp. 888-889, 2014. (Impact factor - 0.93)
- S. Kale and P. N. Kondekar, "Ambipolar leakage reduction in Ge-n-channel schottky barrier MOSFET," IETE Journal of research, vol. 61, no. 4, pp. 323-328, 2015. (Impact factor- 0.2)
- M. Gupta, N. Gaur, S. Singh, N. K. Jaiswal, and P.N. Kondekar, "Tailoring the electronic properties of a Z-shaped graphene field effect transistor via B/N doping," Physics Letters A, vol. 379, issue. 7, pp. 710-718, 2015. (Impact factor 1.683)
- S. Singh, P. N. Kondekar and P. Pal “Non-Hysteretic Behavior of Super Steep Ferroelectric Negative Capacitance Tunnel FET Based on Body Profile Engineering” Journal of low power electronics, (JOLPE), vol. 11, pp. 1-7, 2015, doi:10.1166/jolpe.2015.1411. (Impact factor : 0.485)
- S. Singh, P. N. Kondekar and P. Pal “Non-Hysteretic Behavior of Super Steep Ferroelectric Negative Capacitance Tunnel FET Based on Body Profile Engineering” Journal of low power electronics, (JOLPE), vol. 11, pp. 1-7, 2015, doi:10.1166/jolpe.2015.1411. (Impact factor : 0.485)
- S. Singh and P.N. Kondekar, "Dopingless impact ionization MOS-A remedy for complex process flow," Journal of Semiconductor, vol. 36, no. 7, Jan.2015.
- S. Singh and P.N. Kondekar, "Dopingless impact ionization MOS-A remedy for complex process flow," Journal of Semiconductor, vol. 36, no. 7, Jan.2015.
- S. Singh, and P. N. Kondekar, “Schottky Tunneling Source Impact Ionization MOSFET (STS-IMOS) with Enhanced Device Performance,” International Journal of VLSI design Communication Systems (VLSICS) Vol.6, No.3, pp.41-47, 2015.
- S. Singh, and P. N. Kondekar, “Schottky Tunneling Source Impact Ionization MOSFET (STS-IMOS) with Enhanced Device Performance,” International Journal of VLSI design Communication Systems (VLSICS) Vol.6, No.3, pp.41-47, 2015.
- A. Dixit, S. Singh andP. N. Kondekar, "Ultra-thin impact ionization MOSFET (UTIMOS)- for reduced operating voltages," International Journal of Electron Devices, vol. 19, pp. 1663-1669, 2014.
- P. N. Kondekar and O. H.Sool, “Analysis of the breakdown voltage, the on resistance, and the charge compensation of super-junction power MOSFET,” Journal of Korean Physical Society, vol.44, no.6, pp. 1565-1570, Jun. 2004. (Impact factor- 1.383)
- P. N. Kondekar and O. H. Sool, “Study of the degradation of the breakdown voltage of a super-junction power MOSFET due to charge imbalance,” Journal of Korean Physical Society, vol.48, no.4, pp.624-630 Apr. 2006. (Impact factor-1.328)
- P. N. Kondekar and B. Awadhiya, "Effect of parameter variation in UTBB FDSOINCFET," 2017 Joint IEEE International Symposium on the Applications of Ferroelectric (ISAF)/International Workshop on Acoustic Transduction Materials and Devices (IWATMD)/Piezoresponse Force Microscopy (PFM), Atlanta, GA, 2017, pp. 45-47. doi: 10.1109/ISAF.2017.8000208
- S. Dubey and P. N. Kondekar," Doping dependent stacked channel FinFET for multiple threshold voltage applications," in International Conference on Emerging Electronics, Dec.2016.
- A. Gedam, S. Pandey, S. Yadav, K. Nigam, D. Sharma,P. N. Kondekar,"Realization of Junctionless TFET based Power Efficient 6T SRAM Memory Cell for Internet-of-Things Applications," in Smart Innovation, Systems and Technologies, Communications in Computer and Information Science, Springer, pp. 1-8, 2017.
- S. Pandey, P. N. Kondekar, K. Nigam, and D. Sharma,"A 0.9V, 3.1-10.6 GHz CMOS LNA with high gainand wideband input match in 90 nm CMOS process,"13thIEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Jeju, South Korea, 25-28 Oct. 2016, pp. 1-4.
- B. R. Raad, R. K. Sonkar, and P. N. Kondekar, “Transformer oil age determination using long period grating,” workshop on recent advancement in photonics 2015, IISC Bangalore, 16-17 Dec, 2015.
- K. Nigam, S. Pandey, P. N.Kondekar, andDheeraj Sharma, "Temperature sensitivity analysis of polarity controlled electrically doped hetero-TFET," 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), June 2016.
- B. R. Raad, D. Sharma and P.Kondekar, "Dual work function tunnel field-effect transistor with shifted gate for ambipolar suppression and ON current improvement," International Conference on Computational Techniques in Information and Communication Technologies (ICCTICT), March 2016.
- S. Kale, S. Banchhor andP. N.Kondekar, "Impact of underlap channel on analog/RF performance of dopant segregated Schottky barrier MOSFET on ultra thin body SOI,” International Conference on Emerging Trends in Engineering, Technology and Science (ICETETS-2016), Tamilnadu, India, Feb. 2016.
- R. Sinha, S. Singh and P. N. Kondekar, “Silicon Nanowire Gate-All-Around Junctionless Tunnel FET with Bipolar Action,” 18th international workshop on physics of solid state devices, (IWPSD) 2015.
- A. Singh, S. Singh and P. N. Kondekar, “Effect of Germanium Mole fraction Variation on Bipolar Charge Plasma Transistor,” 18th international workshop on physics of solid state devices, (IWPSD) 2015.
- S. Singh, A. P. Singh, and P. N. Kondekar, “Hetero Gate PNIN Tunnel Field Effect Transistor with enhance device performance”, 4th Student’s Conference on Engineering and Systems 2015.
- A. P. Singh, S. Singh, P. N. Kondekar, P. Jharia, P. Kumar, “Structural Analysis & Mathematical Modeling of Gate Inside Organic Field Effect Transistors (GI-OFET) - A Novel Device Structure”, 4th Student’s Conference on Engineering and Systems 2015.
- A. Naugarhiya and P.N. Kondekar, "Optimized process design flow for fabrication of superjunction VDMOS for enhanced RDSonA," 11th ISETC-2014, Timisoara, Romania.
- P.N. Kondekar and A. Naugarhiya, "AC and transient analysis of SJ VDMOS," 11th ISETC-2014, Timisoara, Romania.
- S. Kale, and P. N. Kondekar, "Impact of underlap channel on the performance of DG SB-MOSFET with Si3N4 spacer layer," IEEE International conference on Electron Devices and Solid-State Circuits, Chengdu, China, 2014.
- S. Banchhor, S. Kale and P. N. Kondekar, "Influence of underlap gate length on analog/ RF performance of pocket doped Schottky barrier MOSFET," 2nd IEEE International Conference on Electronics & Communication systems (ICECS-2015), pp. 1152-1155, 26-27 February, 2015,Coimbatore, India.
- S. Kale, S. Banchhor and P. N. Kondekar, "Performance study of high-k gate & spacer dielectric dopant segregated Schottky barrier SOI MOSFET," 2nd IEEE International Conferenceon Electronics & Communication systems (ICECS-2015), pp. 1142-1145, 26-27 February, 2015, Coimbatore, India.
- S. Singh, P. Kumar and P. N. Kondekar, "Transient analysis & performance estimation of gate inside junctionless transistor (GI-JLT)," International Journal of Electrical, Computer," Electronics and Communication Engineering, vol.8, no.10, World Academy of Science, Engineering and Technology, pp. 1553 −1557, 2014.
- I. Agrawal andP.N. Kondekar, "Performance analysis of tunnel field effect transistor using charge plasma concept," 10th IEEE International Conference on Electronic Devices and Solid State Circuits, (EDSSC-2014), China, 2014.
- I. Agrawal, and P.N.Kondekar, "Drain improvement using spacer and charge plasma concept in T-FET," 18th IEEE International Symposium on Consumer Electronics (ISCE-2014), South Korea, pp.1-2, 2014.
- S. Singh, P. Pal, R. Mittal, A. Tamia, and P.N. Kondekar, "Silicon on ferroelectric tunnel FET (SOF-TFET) for low power application," IEEE International conference on Emerging electronics (ICEE-2014), IISc Bangalore, 4-6 Dec, 2014.
- P. Kumar, S. Singh and P. N. Kondekar, "Transient analysis & performance estimation of gate inside junctionless transistor (GI-JLT)," in 24th GLSVLSI, Houston, Texas, USA, pp 235-236, 2014.
- A. Dixit, S. Singh, P. N. Kondekar and PankajKumar "Performance analysis of lateral impact ionization MOS(LIMOS)," in IEEE conference Techsym 2014, IIT Kharaghpur, India, 2013.
- A. Naugarhiya and P. N. Kondekar, "Electrical characteristics comparison between process and device structures of super junction VDMOS," 2013 International Conference on Control, Automation, Robotics and Embedded Systems (CARE), 16-18 Dec. 2013.
- I. Agrawal, P.N. Kondekarand Sumit Kale, "Performance analysis of tunnel FET," in IEEE International Conference on Circuit, Control and Communication (C-CUBE 2013), at Bangalore, December 2013.
- P. Kumar, C. Sahu, A. Shrivastava, P. N. Kondekar, and J. Singh, "Characteristics of gate inside junctionless transistor with channel length and doping concentration," in IEEE International conference on Electron Devices and Solid-State and Circuits (EDSSC13), Hong Kong, Polytechnic University, 2013.
- P. Kumar, S.Singh, P. N. Kondekar, and A. Dixit, "Digital and analog performance of gate inside p-type junctionless transistor (GI-JLT)," in CIMSim2013, IEEE 5th International Conference on Computational Intelligence, Modeling and Simulation (CIMSim2013), Seoul, Korea, pp. 394-397, 2013.
- P. Kumar, S. Singh, P. N. Kondekarand I. Agrawal, "Characteristic and sensitivity of gate inside junctionless transistor (GI-JLT)," in 20th IEEE International Conference on Electronics, Circuits, and Systems (ICECS-2013), UAE, pp.256-259, 2013.
- S. Pandey, S. Agrawal, Jawar Singh, and P.N. Kondekar, "A low-power and compact CMOS based CDTA and its application," 17th International Symposium on VLSI Design and Test MNIT Jaipur, 2013.
- P. Yadav, D. Kumar, P.N. Kondekar and J. Singh, "Structural analysis of optimized low voltage organic field effect transistor based on pentacene," in International Conference on NUiCONE, 2012.
- C. Sahu, J. Singh and P.N. Kondekar, "Investigation of ultra-thin BOX junctionless transistor at channel length of 20 nm," IEEE International conference on Electron Devices and Solid-State and Circuits (EDSSC’13) Hong Kong, 3-5 June 2013.
- A. Chakraborty, P.N. Kondekar and M. Yadav, "Drive current boosting and low sub-threshold swing obtained by layer in double-gate tunnel FET," in Proc. of ESciNano 2012, Malaysia.
- D. Kumar, P. Yadav, P.N. Kondekar and J. Singh, "High performance organic field effect transistor with tri-gate," in IEEE International Conference on Intelligent System, Modeling& Simulation-2013.
- D. Kumar, P. Yadav, P.N. Kondekar and J. Singh, "Analysis and comparison of organic field-effect transistor with different dielectric insulators," in IEEE International Conference on Intelligent System, Modeling& Simulation -2013.
- P. Yadav, D. Kumar, P.N. Kondekar and J. Singh, "High performance pentacene-based organic transistor with HfO2-Al2O3 as dielectrics," in the International Conference of ICMENS, 2012.
- P. Wakhradkar, A. Naugarhiya and P. N. Kondekar, "Analysis of Anisotropic 4H-SiC SJ Drift Layer," 2nd ET2ECN-2014, SVNIT. Surat India.
- P. N. Kondekar, “Simulation study of charge imbalance in super-junction power MOSFET,” Proc. IEEE EDSSC’05, pp. 551-555 Hong Kong, Dec 2005.
- P. N. Kondekaret. al.,“Simulation, characterization, and modeling of on state charge imbalance in super-junction power MOSFET:CoolMOSTM,”Proc. ICPE’04. pp. II-283~II-285, Busan, South Korea.
- P. N. Kondekar, “The effect of static charge imbalance on forward blocking voltage of super-junction power MOSFET,” Proc. IEEE-TENCON’04, vol. C, pp.209-212, Chiang Mai, Thailand.
- P. N. Kondekar, M.B. Patil and C.D Parikh, “Analysis of breakdown voltage and on resistance of super-junction power MOSFET: CoolMOSTM using theory of novel voltage sustaining layerm,” Proc.PESC’02, vol.4, pp.1769-1778, June 2002, Cairns, Australia.
- P. N. Kondekar, M.B. Patil and C.D Parikh, “Analysis and design of super-junction power MOSFET: CoolMOSTM for improved on resistance and breakdown voltage using theory of novel voltage sustaining layer,” Proc.MIEL’02, pp.209-212, May 2002, Nis, Yugoslavia.
- P. N. Kondekar, M.B. Patil and C.D Parikh, “Break down voltage and on resistance of super-junction MOSFET: CoolMOSTM,” Proc. IWPSD’01, vol.1 pp. 440-443, 2001, IIT Delhi.
- P. N. Kondekar, M.B. Patil and C.D Parikh, “Analytical design methodology of a novel drift-layer for superjunction power MOSFET:CoolMOSTM,” Proc. IWPSD’01, vol.2, pp.1304-1306, 2001, IIT Delhi.
- P. N. Kondekar “EMC-considerations in electronic product design and technology,” National Conference on Recent Trends in Electronic Product Design and Technology, SAS-Mohali, Chandigarh in Apr. 1995.
- P. N. Kondekar, “Static off state and conduction state charge imbalance in the Super-junction power MOSFET: CoolMOS,” Proc. IEEE-TENCON-2003, Bangalore. India.
- Pravin N. Kondekar, et.al “The effect of static charge imbalance on the on state behavior of the superjunction power MOSFET: CoolMOSTM,” IEEE- Proc. PEDS’2003, pp.77-80, Nov. 2003, Singapore. (SCIE)
- P. N. Kondekar, “Analytical modeling and simulation studies of high voltage super-junction drift layer for power MOSFET,” 22nd International Conference on Microelectronics (ICM 2010)
- P. N. Kondekar, “Simulation studies of superjunction power MOSFET: CoolMOSTM,” Proc. IWPSD’03 (CD), 2003, IIT Madras.
- P. N.Kondekar, “Analytical Design and Simulation Studies of Super-junction Power MOSFET,” IEEE (International Symposium on Industrial Electronics) ISIE’07, pp. 503-508, June 4-7, Vigo, Spain.
- R. Kondekar, P. Kondekar, and Deepak Pathak “Technology enabled assessment environment,” pp. 54-60, Proc. IASTED International Conference on Technology for Education, Dec. 2011, Dallas, USA
- A.Kavala, P. N.Kondekar, and Y. Sun, “A low voltage, low power linear pseudo Differential OTA for ultra-high frequency applications,” IEEE International workshop on Antenna Technology, 2009.
- O. Hidayov, H. Zaynuddinov, H. C. Park, P. N.Kondekar, and S.-G. Lee, “Method of Computing Spectral Factors in Piecewise-Quadratic Bases and its Application in Problems of Digital Signal Processing,” Systems, Signals and Image Processing, 2008. IWSSIP 2008. 15th International Conference.
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Steering Committee member of International Design Workshop on leading edge theories and practices in design Oct 2010 at PDPM IIITDM Jabalpur
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Coordinator in Workshop for Hands on training on Circuit Simulation CEDENCE 17-18 Feb 2012 PDPM IIITDM Jabalpur
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Convener in “WON” A 3 Days Workshop on nanofabrication and Nano electronics 25-27 May 2013 PDPM IIITDM Jabalpur
M. Tech./M.Des.
Ph. D.
Contact me
Feel free to contact
P. N. Kondekar
pnkondekar@iiitdmj.ac.in
pnkondekar
linkedin.com/in/pravin-kondekar-436b422
pnkondekar@gmail.com
+91-761-2794460
(Fax) 91-
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