Assistant Professor in the field of Electronics & Communications Engineering

Low Power Memory Design, VLSI Circuit and System Design, Device and Circuit Co-design approach, FPGA Implementation

  • Ph.D. in Electronics and Telecommunication Engineering

    Institute of Engineering and Technology, D.A.V.V. Indore
    December 2018

  • M.Tech in Embedded Systems

    School of Electronics, D.A.V.V. Indore

  • B.E. in Electronics and Communication Engineering

    I.G.E.C. Sagar

  • Since March 2020- Assistant Professor, Electronics and Communication Department

    PDPM IIITDM Jabalpur

  • July 2013-February 2020 Lecturer, Electronics & Telecommunication department

    Institute of Engineering and technology, Devi Ahilya University, Indore

My courses

Current & Previous

Course Code Course name Category Institute Department Link
EC3009 VLSI System Design UG/ IIITDM Jabalpur Electronics & Communication Engineering
IT3b IT Workshop III UG/ IIITDM Jabalpur Electronics & Communication Engineering
ETC543 CMOS Memory Design PG/ IIITDM Jabalpur Electronics & Communication Engineering
Course Code Course name Category Institute
OE3 Digital System Design PG/PhD IIITDM Jabalpur
OE2 Low Power VLSI Design PG/PhD IIITDM Jabalpur
MT502 Concepts of Electronic Devices PG/ IIITDM Jabalpur


Areas or Specialisation / Project Activities / Publications / Books

Memory Design, VLSI System Design

  • Device-Circuit Co-Design Approach for Junction-less FET (JLFET) /Doping-less JLFET (DL-JLFET) Digital Circuits and Memory applications.

    Faculty Initiation Grant, PDPM IIITDM Jabalpur: 7.10 Lakh (Ongoing)

  • Lifetime Reliability Analysis and Mitigation Techniques for High Performance Digital Integrated Circuits

    Sponsored by Madhya Pradesh Council of Science & Technology (MPCST), Bhopal: 7:90 Lakh (Ongoing)

Contact me

Feel free to contact

    Pushpa Raikwal







     (Fax) 91-

     Download CV



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