Profile
Assistant Professor in the field of Computer Science & Engineering
Dr. Vijaypal Singh Rathor did his M.Tech. in Information Security from Maulana Azad National Institute of Technology, Bhopal, and Ph.D. from ABV-Indian Institute of Information Technology and Management Gwalior, India in 2014 and 2020 respectively. At present, he is working as an Assistant Professor in CSE Discipline at PDPM Indian Institute of Information Technology, Design and Manufacturing (IITDM), Jabalpur, India. Prior to joining IIITDM, he has worked as an Assistant Professor at Thapar Institute of Engineering and Technology, Patiala, India. He has also worked as an Assistant Professor in CSE Department at Bennett University, Greater Noida, India. Dr. Rathor has also received a grant as a Principal Investigator for the Project entitled “HT-Pred: A complete defensive machine learning tool for Hardware Trojan Detection” from the Data Security Council of India (DSCI). His research interests include Hardware Security, Trustworthy Circuit design, Hardware Trojan, Machine Learning, IoT and Cloud Computing.
Hardware Security, Trustworthy IC Design Hardware Trojan, Logic Locking, Hardware Accelerators, Machine Learning and IoT.
- Ph.D
ABV-Indian Institute of Information Technology and Management, Gwalior, India
2015-2020 - M. Tech.
Maulana Azad National Institute of Technology, Bhopal, India
2012-2014
- August 2021-Present Assistant Professor
PDPM Indian Institute of Information Technology, Design and Manufacturing, Jabalpur
- February 2021-August 2021 Assistant Professor
Thapar Institute of Engineering and Technology (Thapar University), Patiala
- January 2020-February 2021 Assistant Professor
Bennett University (Times of India Group), Greater, Noida.
- August 2014-June 2015 Assistant Professor
Rustamji Institute of Technology, BSF Academy, Tekanpur
- July 2011-June 2012 Lecturer
Samrat Ashok Technological Institute, Vidisha
- October 2022-Present Central Mess Warden
Faculty-In-Charge Central Mess
Research
Areas or Specialisation / Project Activities / Publications / Books
Hardware Security, Trustworthy IC Design Hardware Trojan, Hardware Accelerators, Machine Learning and IoT
- HT-Pred: A complete defensive machine learning tool for Hardware Trojan Detection. [Completed]
Sponsored by Data Security Council of India (DSCI), Amount: Rs. 4.07 Lakh, Duration: October 28, 2020 to September 17, 2022. Role: PI, Web Link: htpred.com
- UAV-assisted Wi-Fi Geofencing for UAV Tracking and Activity Monitoring in Restricted Perimeter. [Ongoing]
Sponsored by TiHAN-IIT Hyderabad. Amount: Rs. 15.7 Lakh, Duration 18 Months, Start Date: 7/1/2022. Role: Co-PI
- Low Cost Printed Circuit Board Design and Manufacturing Unit. [Ongoing]
Institute Project under DIC. Amount: Rs. 50000/- Role: Co-PI
- A Lightweight Hardware Logic Locking based Data Encryption Model for Securing IoT. [Ongoing]
Sponsored by Data Security Council of India (DSCI). Amount: Rs. 6.0 Lakh + 18% GST. Duration: 6 Months. Start Date: April 2023, Role: PI
- Techniques and Toolkit for Analysis of Multifactor Authentication. [Ongoing]
Sponsored by Defence Research and Development Organization (DRDO), Govt. of India. Amount: Rs. 76.4 Lakh. Duration: 24 Months. Start Date: July 2023. Role: Co-PI.
1. Avinash Chandra Pandey, Abhishek Verma, Vijaypal Singh Rathor, Munesh Singh, Ashutosh Kumar Singh, "Intelligent Analytics for Industry 4.0 Applications", CRC Press, ISBN No. 9781032342412, June 2023.
- 1. V. S. Rathor, RK Pateriya, Rajeev Kumar Gupta, “An Efficient Virtual Machine Scheduling Technique in Cloud Computing Environment", International Journal Modern Education and Computer Science (IJMECS), vol 7, no. 3, pp. 39-46, 2015. [SCOPUS]
- 2. V. S. Rathor, B. Garg, and G. Sharma, “New light weight threshold voltage defined camouflaged gates for trustworthy designs”, Journal of Electronic Testing, vol. 33, no. 5, pp. 657–668, 2017. [SCIE]
- 3. V. S. Rathor, B. Garg and G. K. Sharma, "An Energy-Efficient Trusted FSM Design Technique to Thwart Fault Injection and Trojan Attacks," 31st International Conference on VLSI Design (VLSID), Pune, 2018, pp. 73-78.
- 4. V. S. Rathor, B. Garg, and G. Sharma, “New Lightweight Architectures for Secure FSM Design against Fault Injection and Trojan Attacks”, Journal of Electronic Testing: Theory and Application (JETTA), vol. 34, no. 6, pp. 697–708, Nov, 2018. [SCIE]
- 5. V. S. Rathor, B. Garg and G. K. Sharma, "A Novel Low Complexity Logic Encryption Technique for Design-for-Trust," in IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 3, pp. 688-699, 1 July-Sept. 2020, DOI: 10.1109/TETC.2018.2795706. [SCIE]
- 6. V. S. Rathor and G. K. Sharma, "A Lightweight Robust Logic Locking Technique to Thwart Sensitization and Cone-Based Attacks," in IEEE Transactions on Emerging Topics in Computing, vol. 9, no. 2, pp. 811-822, 1 April-June 2021, doi: 10.1109/TETC.2019.2935250. [SCIE]
- 7. V. S. Rathor, B. Garg and G. K. Sharma, “New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack”, Integration: The VLSI Journal, Elsevier, Vol 75, pp. 178-188, Nov 2020. doi.org/10.1016/j.vlsi.2020.05.001.[SCI]
- 8. V. S. Rathor, B. Garg, Mandar Patil and G. K. Sharma, “Security Analysis of Image CAPTCHA using Mask R-CNN Based Attack Model”, International Journal of Ad Hoc and Ubiquitous Computing (IJAHUC), Vol. 36, No. 4, 2021. [SCIE]
- 9. M. Sajwan, D. Singh, V. S. Rathor and S. Singh, "Tolerance Satisfiability Sequences for Image Similarity," 2020 2nd International Conference on Advances in Computing, Communication Control and Networking (ICACCCN), Greater Noida, India, 2020, pp. 1002-1007, doi: 10.1109/ICACCCN51052.2020.9362789.
- 10. B. Garg, P.S. Rana, and V.S. Rathor, “Significance driven inverse distance weighted filter to restore impulsive noise corrupted X-ray image”. Journal of Ambient Intelligence and Humanized Computing, March 2021. DOI: https://doi.org/10.1007/s12652-021-02962-y. [SCOPUS]
- 11. Richa. Sharma, V. S. Rathor; G.K. Sharma; Manisha Pattanaik, “A New Hardware Trojan Detection Technique Using Deep Convolutional Neural Network”, Integration: The VLSI Journal, Elsevier, Volume 79, Pages 1-11, July, 2021. [SCI]
- 12. Simranjit Singh, Deepak Singh, Mohit Sajwan, V. S. Rathor, and Deepak Garg. Hyperspectral image classification using multi-objective optimization. Multimedia Tools and Applications. 81, 25345–25362 (2022). https://doi.org/10.1007/s11042-022-12462-6. March 23 2022. [SCI]
- 13. Mukhtar Opeyemi Yusuf, Divya Srivastava, Deepak Singh and V. S. Rathor, Multiview deep learning-based attack to break text-CAPTCHAs. International Journal of Machine Learning and Cybernetics 14, 959–972 (2023). https://doi.org/10.1007/s13042-022-01675-8. Published 3 October 2022. [SCI]
- 14. M. Singh, V. S. Rathor, K. Sagar Sahoo and A. H. Gandomi, "Cooperative Geometric Scheme for Passive Localization of Target in an Indoor Environment," 2022 IEEE Symposium Series on Computational Intelligence (SSCI), Singapore, Singapore, 2022, pp. 238-245, doi: 10.1109/SSCI51031.2022.10022273.
- 15. V.S. Rathor, Singh, D., Singh, S. et al. Multi-Objective Optimization Based Test Pattern Generation for Hardware Trojan Detection. J Electron Test (2023), Vol. 39, No. 3, 2023. https://doi.org/10.1007/s10836-023-06071-w. [SCIE]
- 16. V. S. Rathor, and G. K. Sharma, “A New Efficient ATPG and Online Checking Based Technique for Detecting Stealthy Trojans”, Microprocessors and Microsystems, Elsevier, Volume 101, 2023, 104903. [SCI].
- 17. D. Mishra, A. Kumar and V. S. Rathor, "Performance of Interpolation Techniques for Compression of Crop Image: A Comparative Study," 2023 International Conference on Computer, Electronics & Electrical Engineering & their Applications (IC2E3), Srinagar Garhwal, India, 2023, pp. 1-7, doi: 10.1109/IC2E357697.2023.10262677.
- 18. Deepak Mishra, Anil Kumar, V. S. Rathor, G. K. Singh, “Hybrid Technique for Crop Image Compression using Discrete Wavelet Transform and Sparse Singular Vector Reconstruction”, Computers and Electronics in Agriculture, Volume 215, Nov, 2023, 108391, ISSN 0168-1699, https://doi.org/10.1016/j.compag.2023.108391. [SCIE]
- 19. V. S. Rathor, M. Singh, K. S. Sahoo and S. P. Mohanty, "GateLock: Input-Dependent Key-Based Locked Gates for SAT Resistant Logic Locking," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 32, no. 2, pp. 361-371, Feb. 2024, doi: 10.1109/TVLSI.2023.3340350
- Patent Publications:
1. Shashidara R. and Vijaypal Singh Rathor, “Mutual Authentication Network in Mobility Network”, Indian Patent No: 202011046288, 23 OCT 2020. [Status: Published]
2. Vijaypal Singh Rathor, Munesh Singh, Bharat Garg “System and Method for Implementing Input Dependent Key-based Logic Locking to Secure Integrated Circuit”, Indian Patent No: 202221031928, Filed: 03 June, 2022, Published: 17-06-2022. [Status: Published].
3. Munesh Singh and Vijaypal Singh Rathor, “An Automated Ammonia Testing System for Freshwater Aquaculture”, Indian Patent No.: 202321045617, Filed: 07-07-2023.
M. Tech./M.Des.
Ph. D.
| Roll no | Name | Status | Year | Specialization | Co-guide |
|---|---|---|---|---|---|
| 21PECE04 | Deepak Mishra | Ongoing | 2021- | Image Compression | Dr. Anil Kumar |
| 22PCS003 | Sudha Singh | Ongoing | 2022- | Security Aspects of Wireless Devices | Prof. Pritee Khanna |
Contact me
Feel free to contact
Vijaypal Singh Rathor
vrathor@iiitdmj.ac.in
https://www.facebook.com/vijaypal.rathor
https://www.linkedin.com/in/vijaypal-singh-rathor-4984b539/
vijay.palrathor@gmail.com
(Fax) 91-
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