Assistant Professor in the field of Computer Science & Engineering
Dr. Vijaypal Singh Rathor did his M.Tech. at the Department of Computer Science & Engineering from Maulana Azad National Institute of Technology, Bhopal, and Ph.D. in “Design for-Trust Techniques for Trustworthy System Design” at the Department of Information Technology from ABV-Indian Institute of Information Technology and Management Gwalior, India in 2014 and 2020 respectively. At present, he is working as an Assistant Professor in CSE Department at PDPM IIITDM, Jabalpur, India. Prior to joining IIITDM, he has worked as an Assistant Professor at Thapar Institute of Engineering and Technology, Patiala, India. He has also worked as an Assistant Professor in CSE Department at Bennett University, Greater Noida, India. Dr. Rathor has also received a grant as a Principal Investigator for the Project entitled “HT-Pred: A complete defensive machine learning tool for Hardware Trojan Detection” from the Data Security Council of India (DSCI). His research interests include trustworthy circuit design techniques to thwart hardware-based attacks, hardware Trojan detection using machine learning, accelerators for machine learning and Cloud Computing. He has authored over 10 research articles in the international journal/conference of repute including IEEE Transactions.
Hardware Security, Trustworthy IC Design Hardware Trojan, Logic Locking, Hardware Accelerators, Machine Learning and IoT.
ABV-Indian Institute of Information Technology and Management, Gwalior, India
- M. Tech.
Maulana Azad National Institute of Technology, Bhopal, India
- August 2021-Present Assistant Professor
PDPM Indian Institute of Information Technology, Design and Manufacturing, Jabalpur
- February 2021-August 2021 Assistant Professor
Thapar Institute of Engineering and Technology (Thapar University), Patiala
- January 2020-February 2021 Assistant Professor
Bennett University (Times of India Group), Greater, Noida.
- August 2014-June 2015 Assistant Professor
Rustamji Institute of Technology, BSF Academy, Tekanpur
- July 2011-June 2012 Lecturer
Samrat Ashok Technological Institute, Vidisha
Areas or Specialisation / Project Activities / Publications / Books
Hardware Security, Trustworthy IC Design Hardware Trojan, Hardware Accelerators, Machine Learning and IoT
- HT-Pred: A complete defensive machine learning tool for Hardware Trojan Detection
DATA SECURITY COUNCIL OF INDIA (DSCI), On going
- Richa. Sharma, V. S. Rathor; G.K. Sharma; Manisha Pattanaik, “A New Hardware Trojan Detection Technique Using Deep Convolutional Neural Network”, Integration: The VLSI Journal, Elsevier, Volume 79, Pages 1-11, July, 2021.
- B. Garg, P.S. Rana, and V.S. Rathor, “Significance driven inverse distance weighted filter to restore impulsive noise corrupted X-ray image”. Journal of Ambient Intelligence and Humanized Computing, March 2021. DOI: https://doi.org/10.1007/s12652-021-02962-y
- M. Sajwan, D. Singh, V. S. Rathor and S. Singh, "Tolerance Satisfiability Sequences for Image Similarity," 2020 2nd International Conference on Advances in Computing, Communication Control and Networking (ICACCCN), Greater Noida, India, 2020, pp. 1002-1007, doi: 10.1109/ICACCCN51052.2020.9362789.
- V. S. Rathor, B. Garg, Mandar Patil and G. K. Sharma, “Security Analysis of Image CAPTCHA using Mask R-CNN Based Attack Model”, International Journal of Ad Hoc and Ubiquitous Computing (IJAHUC), Vol. 36, No. 4, 2021
- V. S. Rathor, B. Garg and G. K. Sharma, “New lightweight Anti-SAT block design and obfuscation technique to thwart removal attack”, Integration: The VLSI Journal, Elsevier, Vol 75, pp. 178-188, Nov 2020. doi.org/10.1016/j.vlsi.2020.05.001
- V. S. Rathor and G. K. Sharma, "A Lightweight Robust Logic Locking Technique to Thwart Sensitization and Cone-Based Attacks," in IEEE Transactions on Emerging Topics in Computing, vol. 9, no. 2, pp. 811-822, 1 April-June 2021, doi: 10.1109/TETC.2019.2935250.
- V. S. Rathor, B. Garg and G. K. Sharma, "A Novel Low Complexity Logic Encryption Technique for Design-for-Trust," in IEEE Transactions on Emerging Topics in Computing, vol. 8, no. 3, pp. 688-699, 1 July-Sept. 2020, DOI: 10.1109/TETC.2018.2795706.
- V. S. Rathor, B. Garg, and G. Sharma, “New Lightweight Architectures for Secure FSM Design against Fault Injection and Trojan Attacks”, Journal of Electronic Testing: Theory and Application (JETTA), vol. 34, no. 6, pp. 697–708, Nov, 2018
- V. S. Rathor, B. Garg and G. K. Sharma, "An Energy-Efficient Trusted FSM Design Technique to Thwart Fault Injection and Trojan Attacks," 31st International Conference on VLSI Design (VLSID), Pune, 2018, pp. 73-78.
- V. S. Rathor, B. Garg, and G. Sharma, “New light weight threshold voltage defined camouflaged gates for trustworthy designs”, Journal of Electronic Testing, vol. 33, no. 5, pp. 657–668, 2017.
- V. S. Rathor, RK Pateriya, Rajeev Kumar Gupta, “An Efficient Virtual Machine Scheduling Technique in Cloud Computing Environment", International Journal Modern Education and Computer Science (IJMECS), vol 7, no. 3, pp. 39-46, 2015
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